Floating-gate memories memorize or store data bits by means of electrical charges accumulated in their floating gates. The accumulation of charges in the floating gate acts on the threshold voltage Vt of each floating-gate transistor, and the effect is expressed in many ways. It may be assumed that the charging of the floating gate acts on the current flowing through the channel of the transistor or acts on the resistance of the channel (the reasoning is equivalent in both cases).
During the reading of these memories, the cell to be read is connected to a bit line which has available a resistive or current source type of load that is used to preamplify the information contained in the transistor and to convert the current flowing through the storage transistor (or the equivalent resistor of the channel) into a voltage at the terminals of the storage cell. The voltage at the terminals of the cell is compared with a read reference voltage that corresponds to an intermediate voltage which differentiates the logic levels memorized.
One technique used to carry out a write operation or an erasure of these memories includes charging or discharging the floating gates of the transistors of the storage cells up to a predefined level. This predefined level corresponds to the read reference voltage plus or minus an additional voltage corresponding to a "safety margin" to ensure that the information is maintained over time in the storage transistor. To be sure of reaching the desired level, a verification may be made of the write or erasure operation. The verification makes it possible to reduce the programming and erasure times for all that is done is to attain the appropriate level without its being necessary to use a defined programming or erasure time to be sure of reaching the appropriate level in the worst possible case. Furthermore, in certain memories, excess charges may prompt errors requiring a routine check on write and erasure operations.
The verification of a write or erasure operation is done as a read operation that uses low-level or high-level reference voltages which take into account the safety band. Furthermore, the storage cells may be grouped by word to use a selection transistor common to the entire word. If it is sought to use the verification of writing and erasure with memories organized in words, it is necessary to take into account the word selection transistor. Indeed, the selection transistor is series-connected with all the word storage transistors, and collects the sum of the currents flowing through each storage transistor.
To provide a clearer explanation of what happens, the example used here is that of a memory whose "erased" state corresponds to a charged state of the floating gate of the storage transistor, such that the threshold voltage Vt of the storage transistor is small but positive. The "written" state of a storage transistor is expressed by a floating gate whose charge corresponds to a high threshold voltage Vt of the transistor, making the storage transistor almost off. The drain-source voltage of a storage transistor, when it is selected, must be lower than V1 in order to have the certainty that it is truly erased, and greater than V2 to have the certainty that it is truly written.
During the erasure of the word, the floating gates of the storage transistors of the word to be erased are charged and then, for verification, the contents of the word are read by using, as a reference voltage, a voltage V1 added to the drain-source voltage of the word selection transistor. For the writing, the gates of certain of the storage transistors are charged as a function of the word to be written, and then a read operation is performed in using a write reference voltage that corresponds to the voltage V2 plus the drain-source voltage of the word selection transistor.
For example, when the storage transistors are on, the currents flowing through each storage transistor are in the range of 50 .mu.A and the resistance of the channel of the selection transistor is in the range of 1 k.OMEGA.. If 8-bit words are used, the reference voltage to be used for the erasure must be equal to V1+0.4 volts. However, those skilled in the art will see that the voltage to be added to V2 may be variable as a function of the word written. It therefore appears to be necessary to raise the voltage to be added to V2 to obtain the write reference voltage. The computation of the reference voltage must, therefore, take into account the worst case which corresponds to a single bit to be written. The reference voltage should be equal to V2+0.35 volts.